Acorn BBC BASIC II

MOS dispatches JMP &8000 on language startup.

Byte 0 is &c9 — the language entry is inline code, not a JMP abs. This ROM declares itself a language (rom_type bit 6 set) and the MOS enters by calling &8000 directly, so the bytes are executed in place (e.g. BBC BASIC's CMP #1 / BEQ / RTS).

Reason code in A on entry:

Reached from the language entry when the MOS starts BASIC (A = 1). Reads HIMEM and PAGE from the MOS, clears the print and formatting state, seeds the random-number generator if it is cold, installs the BASIC error handler in BRKV, and jumps to start_new_program, which clears any program and enters the immediate ("> ") loop.

Each entry is the keyword in ASCII, then a token byte (bit 7 set), then a flag byte that drives tokenising. The flag bits are:

Bit 6 is why a pseudo-variable like PTR reads as &8F in a function position but &CF as an assignment target. Entries are ordered so that the first acceptable abbreviation of each keyword is unambiguous.

The tokeniser scan stops at WIDTH's token &FE, which doubles as the end-of-table sentinel (see the cmp #&fe in the keyword search). The final five entries — the PTR/PAGE/TIME/LOMEM/HIMEM assignment forms &CF-&D3 — sit past that sentinel, so the tokeniser never matches them (it produces those tokens arithmetically via bit 6). They exist only for the de-tokeniser (print_token, which has no sentinel and scans by token value) to render PTR= etc. back to text. The data then runs on to the action-address tables at action_table_lo.

Three parallel byte arrays, all indexed by the same X, that turn a typed mnemonic into a base opcode:

asm_parse_mnemonic (&85BA) reads the three mnemonic letters, keeps the low 5 bits of each (A=1..Z=26) and packs them MSB-first into a 15-bit value in &3D (low) / &3E (high). asm_mn_search (&85F1) then scans X from &3A down to 1, comparing the low half against asm_mnemonic_lo,x and, on a hit, the high half against asm_mnemonic_hi,x; the matching index selects asm_base_opcode,x. Tokenised AND/EOR/OR reach the same indices directly via asm_logic_mnemonic (&8607).

Because the two hash tables are pure functions of the mnemonic text, each asm_mnemonic_lo / asm_mnemonic_hi byte is emitted as the beebasm expression that re-derives it from the three letters (the assembled value is shown in the address comment). asm_base_opcode holds real 6502 opcodes and stays a plain byte.

The index order is meaningful: the operand parser keys its addressing-mode handler off cpx thresholds on the matched index.

Base opcodes are each group's column-0 value; the operand parser adds addressing-mode offsets via asm_opcode_add4/8/16, so a few bases (e.g. BIT &20, LDX/LDY-immediate &A2/&A0) are the slot value, not a legal standalone opcode. OPT (&39) and EQU (&3A) are directives and have no asm_base_opcode entry.

Two space-saving quirks. Index 0 is dead: the scan starts at &3A and stops at 1, so index 0 is never tested. And the tables overlap by one byte - asm_mnemonic_lo[&3A] is the first byte of asm_mnemonic_hi, and asm_mnemonic_hi[&3A] is the first byte of asm_base_opcode. The reuse is safe precisely because index 0's own high and opcode bytes, which those shared bytes stand in for, are never read.

Leave the inline 6502 assembler (reached at "]"): set the OPT flag to &FF (not assembling) and jump back into the statement interpreter.

Reached by the jmp asm_enter at &8B44, in check_eq_star_bracket, when a "[" opens an assembler block. Sets the default OPT 3 (listing + error reporting, assemble to P%) and falls into asm_loop, which assembles one instruction or directive per statement, optionally lists it, and advances. The loop runs until "]" (-> assembler_exit, back to the interpreter) or the end of the program (-> immediate_loop). Does not return.

Skip to the mnemonic at PtrA, handling end-of-statement and labels, then pack its three letters (5 bits each) into &3D/&3E for the opcode-table lookup.

The inline assembler's byte-emit routine. Copies the assembled bytes to the destination given by P% (resint_p, &0440), or by O% (resint_o, &043C) when OPT selects offset assembly (OPT >= 4), then advances P% (and O% for offset assembly) past them. Y is the signed byte count: 0 emits nothing; a positive count stores that many opcode/operand bytes from the assembly buffer at zp_asm_opcode (&29); a negative count is an EQUS, storing zp_strbuf_len (&36) bytes taken from string_work (&0600).

Adjust the opcode being built for absolute addressing (asm_opcode_add4), then fall into asm_zp_or_abs, which tests the high byte of the evaluated operand address in zp_iwa: high byte zero emits the two-byte zero-page form (asm_two_byte), otherwise the three-byte absolute form (asm_indexed_adjust). The inline assembler's addressing-mode handler for absolute / zero-page operands.